This invention relates to integrated circuit (IC) packaging, and more particularly to those IC packages which provide the connections between one set of nodes on an IC chip and a corresponding set of nodes on a circuit board. In this application, the term IC package is defined to mean the latter type of package.
Typically, multiple IC packages are mounted on a single circuit board. Then, the IC packages are selectively interconnected with either printed conductors or discrete wires on the circuit board. Multiple circuit boards can also be selectively interconnected in various ways, such as by providing the boards with contact pins and inserting them into a backpannel.
In the prior art, practically all IC packages interconnected each node on the chip to its corresponding node on the circuit board with two serially connected leads. First, a relatively thin lead was bonded at one end to the node on the chip. This lead was either a discrete wire or a printed wire in a beam lead tape. In either case, the lead had to be thin since a typical IC chip is quite small (e.g. 120 mill.times.120 mill) and thus the nodes on the chip are close to each other.
Next, a relatively thick lead was bonded to the opposite end of the thin lead. This thick lead was much more rigid than the thin lead which made it suitable for insertion into a via hole on the circuit board. Every node on the IC chip was similarly bonded to one thin lead and one thick lead. Then, the chip, the thin leads, and an adjacent portion of the thick leads were encapsulated to complete the IC package.
Many versions of the above IC package have been described in the prior art. For example, see U.S. Pat. Nos. 3,763,404 (FIG. 5); 3,909,838 (FIG. 1); 3,975,757 (FIG. 2); and 4,079,511 (FIG. 13). All of those IC packages are unattractive however because they require two bonding steps, as opposed to only one bonding step, for each node on the IC chip that is to be connected to the circuit board. These bonding steps are both time consuming and expensive to perform.
By comparison, U.S. Pat. No. 4,024,570 describes an IC package which connects each node on the chip to its corresponding node on the circuit board with only one relatively thin lead. The end of the thin lead that contacts the circuit board is not inserted into a via hole, but instead it is soldered to the surface of the circuit board. This is attractive since only one bonding step is required for each node on the chip. However, due to its particular structure, that IC package has several other drawbacks.
For example, the IC package of patent '570 occupies too much surface area on the circuit board. This is because it requires the use of a base plate that is substantially wider than the chip itself in order to hold the thin leads in place. In particular, the base plate attaches to and extends out from the bottom of the chip; and then the leads are glued in place on the extending portion of the base plate.
Another drawback in the IC package of patent '570 is that catastrophic shorts can occur between the leads and the sides of the base plate. In order to prevent those shorts, the leads cannot make a 90.degree. turn from their glued position at top of the base plate to the underlying circuit board; but instead they must make contact with the circuit board at some smaller angle. This results in a further increase in the effective surface area of the IC package.
The above problem is most severe when the chip that is packaged dissipates a large amount of power. The reason is that in patent '570 the base plate also serves as the heat sink for the chip. Thus as power dissipation increases, the height of the base plate must also increase. And a high base plate makes shorts more likely, unless the leads are widely fanned out away from the base plate.
Therefore, it is a primary object of the invention to provide an improved IC package.
Another object of the invention is to provide an IC package that requires only one bonding step to fabricate for each node on the chip to be packaged, and which occupies a minimal amount of surface area on a circuit board.